CHREC XML

About CHREC XML

CHREC XML is a set of vendor extensions to the hardware intellectual property (IP) standard IP-XACT developed by the SPIRIT Consortium and maintained by Accellera. IP-XACT defines the meta-data elements required to represent IP cores. The IP-XACT specification requires that IP be connected to a standard bus and contains no notion of interface protocol. The CHREC XML extensions define the elements needed to extend this specification to more arbitrary cores.

CHREC XML extends IP-XACT in three primary ways:

  1. Interface Details: Extensions are made to describe the behavior of cores that fit the homogeneous synchronous dataflow model of computation. This means that cores that are described with these extensions have a constant data introduction interval and a constant pipeline depth or latency.
  2. High-level data types: The ability to attach numerical “high-level” types is added. Ports can reference a parameterizable type that is defined in the IP description file. The types supported by this extension set include:
    • Bit Vector
    • String
    • Integer
    • Floating Point
    • Fixed Point
    • Character
    • Boolean
    • Custom
  3. Parameterization: Some classification of ports and further ability to parameterize extensions and ranges is added.

Obtaining CHREC XML

The schema can be obtained here.

Other Resources

Several published papers discuss the usage of CHREC XML including the following:

  1. A. Arnesen, K. Ellsworth, D. Gibelyou, T. Haroldsen, J. Havican, M. Padilla, B. Nelson, M. Rice, and M. Wirthlin, “Increasing Design Productivity Through Core Reuse, Meta-Data Encapsulation, and Synthesis,” Proc. of International Conference on Field-Programmable Logic and Applications (FPL), Aug. 31 – Sep. 2, 2010. (Here)
  2. A. Arnesen, N. Rollins, and M. Wirthlin, “A Multi-Layered XML Schema and Design Tool for Reusing and Integrating FPGA IP,” Proc. of Intl. Conference on Field-Programmable Logic and Applications (FPL), Prague, Czech Republic, Aug. 31 – Sep. 2, 2009. (Here)
  3. N. Rollins, M. Wirthlin, and A. Arnesen, “An XML Approach to Facilitating IP Core Reuse,” Proc. of National Aerospace & Electronics Conference (NAECON), Dayton, OH, July 16-18, 2008. (Here)