Estimating Soft Processor Soft Error Sensitivity through Fault Injection

Author N. A. Harward; M. R. Gardiner; L. W. Hsiao; M. J. Wirthlin
Abstract Soft processors are increasingly used on SRAM-based FPGAs for reliable computing systems. In a radiation environment like space, the configuration memory used to configure a soft processor is sensitive to single event upsets (SEUs). Tools are needed to evaluate and estimate the reliability of soft processors in these environments. Fault injection is used to evaluate the configuration memory sensitivity of soft processor designs. This paper describes our fault injection experiments and the sensitivity results on each soft processor experiment. A suite of five benchmarks were executed on the MicroBlaze soft processor to measure the sensitivity of the processor to the software being executed. In addition, several soft processors were evaluated on a Virtex-5 FPGA: Micro Blaze, LEON3, Arm Cortex-M0, Open RISC, and Pico Blaze. For the software benchmarks, we find that the sensitivity varies as much as 54%. For simple processor configurations running the Towers of Hanoi benchmark, we measure as low as 7,116 sensitive bits for the Pico Blaze, and as high as 112,223 sensitive bits for the Cortex M0.
Publication Field-Programmable Custom Computing Machines (FCCM), 2015 IEEE 23rd Annual International Symposium on
Pages 143-150
Date 2015
DOI 10.1109/FCCM.2015.61


Benchmark testing;Circuit faults;Field programmable gate arrays;Routing;Sensitivity;Single event upsets