Date And Location

Friday, 2 September 2016, Lausanne, Switzerland

Co-located with the International Conference on Field Programmable Logic and Applications (FPL)

Workshop Summary

Programmable devices are very attractive for a variety of applications due to their high levels of logic integration, their flexibility during the project lifetime, and their reconfigurability. However, SRAM-based FPGAs are particularly susceptible to single-event upsets due to ionizing radiation found in the terrestrial environment, high-altitude applications, space, and unique radiation environments such as high-energy physics. The objective of this workshop is to share information and results related to the reliable use of SRAM-based FPGAs in the presence of single-event effects. This topic is of interest to users of FPGAs in a variety of unique environments such as space, avionics, high-reliability, FPGA-based data centers, and high-energy physics. This topic will be of increasing interest to a variety of users as the densities of FPGAs continue to increase and the effects of ionizing radiation play a more important part of large FPGA-based systems.

Topics of the SEPL Workshop include, but are not limited to:

  • Novel High-Reliability FPGA Applications
    • Spacecraft systems
    • Avionics and high-altitude systems
    • High-reliability terrestrial environments
    • FPGA data centers
    • FPGAs in high-energy physics experiments
  • Designer case studies of FPGAs in high reliable applications
  • SEU Mitigation Strategies for FPGAs
  • SEU modeling and upset estimation
  • Radiations effects in FPGAs
  • Novel fault-tolerant techniques for FPGAs
  • Automated tools for SEU mitigation
  • Radiation test data of FPGAs
  • Hybrid FPGA/Processor Reliability and Mitigation
  • Quantitative studies on the value of different mitigation strategies
  • FPGA Architecture proposals for SEU mitigation and tolerance

Call for Papers

Perspective authors are invited to submit original contributions (up to eight pages) or extended abstracts describing work-in-progress or position papers (not exceeding four pages). All papers should be formatted as double column, single spaced, Times or equivalent font of minimum 10pt. We recommend that you use the standard IEEE conference template for LaTeX format (

All submissions have to be sent via the conference management system EasyChair. Please set up your own personal account if you do not already own an EasyChair account.

Workshop Schedule

10 July 2016 Submission deadline
29 July 2016 Notification of acceptance
2 September 2016 Workshop


Mike Wirthlin, Professor at Brigham Young Unviersity

Mike Hutton, Altera/Intel